Partial-Gated Memristor Crossbar for Fast and Power-Efficient Defect-Tolerant Training

Area of Science:

• Neuromorphic Engineering
• Materials Science
• Computer Engineering

Background:

• Real-world memristor crossbars contain defects that necessitate retraining after initial pre-training.
• The back-propagation algorithm is used to update memristor weights during retraining.
• Current memristor programming methods are time-consuming and energy-intensive due to incremental adjustments.

Purpose of the Study:

• To propose a partial gating scheme to reduce the programming time and power consumption for retraining defective memristor crossbars.
• To enable efficient fine-tuning of memristor conductance by selectively training neurons responsible for recognition errors.

Main Methods:

• Development of a partial gating scheme for selective neuron training.
• Verification using CADENCE circuit simulation with a real memristor Verilog-A model.
• Evaluation of recognition rate and resource savings on MNIST and CIFAR-10 datasets.

Main Results:

• The partial gating scheme significantly reduces programming time and power consumption.
• Programming time savings of 86% and power savings of 89.5% were achieved compared to full retraining.
• A minimal loss in recognition rate was observed (2.5% for MNIST, 2.9% for CIFAR-10).

Conclusions:

• The partial gating scheme offers an efficient solution for retraining defective memristor crossbars.
• This method substantially decreases energy and time costs associated with memristor programming.
• The approach balances efficiency gains with acceptable performance degradation for practical applications.