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Process-Induced Random Variation: Work-Function Variation in Stacked Nanowire Field Effect Transistor.

Jinyoung Park1, Changhwan Shin2

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Work function variation (WFV) impacts stacked nanowire field effect transistors (stacked NWFETs). Increasing the number of stacked nanowires effectively suppresses WFV-induced threshold voltage variation, while nanowire spacing has no significant effect.

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Area of Science:

  • Semiconductor device physics
  • Nanotechnology
  • Materials science

Background:

  • Work function variation (WFV) is a critical factor affecting the performance of advanced semiconductor devices.
  • Stacked nanowire field effect transistors (stacked NWFETs) offer enhanced performance but require careful analysis of WFV effects.
  • Understanding WFV impact is crucial for optimizing gate materials in high-k/metal gate stacks.

Purpose of the Study:

  • To investigate the impact of work function variation (WFV) on stacked nanowire field effect transistors (stacked NWFETs).
  • To quantitatively analyze how the number of stacks and inter-nanowire distance influence WFV-induced threshold voltage (VT) variation.
  • To explore mitigation strategies for WFV effects in stacked NWFETs.

Main Methods:

  • Utilized technology computer-aided design (TCAD) simulations to model stacked NWFETs.
  • Incorporated metal grain granularity with varying work function values and probabilities to represent gate materials.
  • Systematically varied the number of nanowire stacks and the distance between nanowires.

Main Results:

  • WFV-induced threshold voltage (VT) variation is effectively suppressed in gate-all-around nanowire structures due to smaller effective grain sizes.
  • Increasing the number of stacked nanowires in stacked NWFETs significantly suppresses WFV-induced VT variation.
  • The distance between nanowires in stacked NWFETs was found to have no discernible impact on WFV-induced VT variation.

Conclusions:

  • The number of stacks is a key design parameter for mitigating WFV effects in stacked NWFETs.
  • Device scaling and architectural choices in stacked NWFETs can be leveraged to manage performance variations.
  • Further research can explore alternative gate materials and fabrication techniques to minimize WFV impact.