New Logic-In-Memory Paradigms: An Architectural and Technological Perspective.

Area of Science:

• Computer Architecture
• VLSI Design
• Emerging Technologies

Background:

• Modern computing systems face challenges with increasing power consumption and the "memory wall" or "von Neumann bottleneck" due to data movement between memory and processing units.
• The performance gap between processing units and memory, exacerbated by data-intensive applications like Machine Learning, leads to significant energy waste and processing delays.
• Complementary metal-oxide semiconductor (CMOS) technology scaling is nearing its physical limits, necessitating exploration of alternative solutions.

Purpose of the Study:

• To address the limitations of current processing systems, specifically power consumption and the memory wall problem.
• To propose a novel architectural and technological approach for more efficient computing.
• To investigate the potential of in-memory computing and non-CMOS technologies.

Main Methods:

• Development of a novel Configurable Logic-in-Memory Architecture.
• Exploitation of the in-memory computing paradigm to minimize data movement.
• Exploration of non-CMOS technologies as a viable option for logic-in-memory implementations.

Main Results:

• The proposed Configurable Logic-in-Memory Architecture effectively reduces the memory wall problem.
• The architecture offers high performance through flexibility and parallelism inherent in in-memory computing.
• Non-CMOS technologies show promise as suitable candidates for future logic-in-memory paradigms.

Conclusions:

• The novel Configurable Logic-in-Memory Architecture presents a viable solution to enhance computing efficiency and performance.
• In-memory computing, coupled with advanced non-CMOS technologies, offers a path forward to overcome current technological bottlenecks.
• This research paves the way for more power-efficient and high-performance computing systems.