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Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors.

Ali Saeidi1, Farzan Jazaeri2, Igor Stolichnov2

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Negative Capacitance (NC) overcomes fundamental limits in conventional transistors. Integrating ferroelectric materials boosts MOSFET performance, significantly reducing power consumption for digital and analog applications.

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Area of Science:

  • Solid State Physics
  • Materials Science
  • Semiconductor Device Physics

Background:

  • Conventional Metal-Oxide-Semiconductor (MOS) devices face fundamental energy dissipation limits due to Boltzmann electron energy distribution.
  • A minimum gate voltage increase is required for current enhancement, hindering further miniaturization and efficiency.

Purpose of the Study:

  • To experimentally validate Negative Capacitance (NC) as a universal performance booster for complementary Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs).
  • To demonstrate the application of NC in advanced CMOS technology nodes for both digital and analog circuits.

Main Methods:

  • Integration of a ferroelectric material (PZT capacitor) into the gate stack of n-type and p-type MOSFETs.
  • Experimental characterization of device performance metrics including subthreshold swing, overdrive, and current efficiency factor.

Main Results:

  • Achieved a sub-thermal swing down to 10 mV/decade and an enhanced current efficiency factor up to 10^5 V^-1 at room temperature.
  • Demonstrated significant enhancements in key figures of merit for information processing.
  • Reduced required supply voltage by approximately 50% for the same on-current.

Conclusions:

  • Negative Capacitance effectively overcomes the Boltzmann limit in conventional transistors.
  • NC integration into the gate stack acts as a universal performance booster for both n- and p-type MOSFETs.
  • This approach offers substantial improvements in energy efficiency and performance for future electronic devices.