A 678-μW Frequency-Modulation-Based ADC With 104-dB Dynamic Range in 44-kHz Bandwidth

This brief presents a frequency-modulation-based analog-to-digital converter (FM ADC) that takes advantage of the coding gain resulting from bandwidth expansion in the analog domain of FM systems to achieve high dynamic range and incorporates a highly digital demodulation approach for power efficiency. The novel architecture employs a sinusoidal output voltage-controlled oscillator (VCO), a relatively low-resolution successive approximation register ADC to sample signals in the FM domain, and then a digital signal processing FM demodulator to recover high-resolution samples of the VCO's original analog input. The proposed ADC is implemented in 0.5-mm² of 65-nm CMOS; it achieves 104-dB DR, 99-dB SNR, and 71-dB SNDR in a 44-kHz bandwidth while dissipating 678 μW of power. The architecture of the FM ADC leverages analog domain processing for system performance and digital domain processing for lower power. This novel approach presents a viable alternative to delta-sigma converters for high dynamic range conversion in advanced process nodes.