A Unified Capacitive-Coupled Memristive Model for the Nonpinched Current-Voltage Hysteresis Loop

Area of Science:

• Electrical Engineering
• Materials Science
• Solid-State Physics

Background:

• The memristor, proposed in 1971, is the fourth fundamental circuit element.
• Understanding the non-pinched current-voltage (I-V) hysteresis loop in memristors remains a challenge.

Purpose of the Study:

• To propose a physical model explaining the origin of non-pinched I-V hysteresis in memristors.
• To elucidate the capacitive-coupled memristive effect responsible for this behavior.

Main Methods:

• Development of a physical model incorporating a parallel capacitor.
• Replication of eight characteristic nonlinear I-V behaviors.
• Analysis of reversible transitions between non-pinched and pinched I-V loops.

Main Results:

• The proposed model successfully explains non-pinched I-V hysteresis originating from capacitive coupling.
• The model replicates all observed non-pinched I-V curves in experiments.
• A reversible transition between non-pinched and pinched I-V loops was demonstrated, explaining experimental data in C15H11O6-based devices.

Conclusions:

• The capacitive-coupled memristive effect is crucial for understanding non-pinched I-V hysteresis.
• The model provides vital physics insights for memristor behavior and materials development.
• This work advances the understanding of memristor characteristics and their potential applications.