Retention-Aware DRAM Auto-Refresh Scheme for Energy and Performance Efficiency.

Area of Science:

• Computer Engineering
• Semiconductor Memory Technology

Background:

• Dynamic Random Access Memory (DRAM) requires frequent refresh cycles to maintain data integrity.
• Increasing DRAM density exacerbates refresh overhead, leading to performance degradation and energy waste.
• Existing refresh mechanisms often refresh all cells uniformly, even those with sufficient data retention.

Purpose of the Study:

• To propose an integrated DRAM refresh scheme optimizing refresh operations.
• To reduce unnecessary refreshes for normal cells, thereby saving energy and improving performance.
• To address the challenges posed by increased refresh cycle times and weak cell distribution in high-density DRAM.

Main Methods:

• Integration of the retention-aware auto-refresh (RAAR) method with 2x granularity auto-refresh.
• Development of a memory controller modification to support the integrated refresh scheme.
• Utilizing a profile of weak cell distribution to dynamically select the most appropriate refresh technique.

Main Results:

• The proposed integrated scheme significantly improves system performance.
• A substantial reduction in DRAM refresh energy consumption was observed.
• The methodology maintains performance and energy efficiency even with an increased number of weak cells, such as in 3D-stacked architectures.

Conclusions:

• The retention-aware integrated refresh scheme effectively mitigates DRAM refresh overhead.
• This approach offers a viable solution for enhancing energy efficiency and performance in modern, high-density DRAM.
• The proposed method demonstrates robustness against variations in weak cell distribution and thermal effects.