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Updated: Jan 19, 2026

Developing High Performance GaP/Si Heterojunction Solar Cells
Published on: November 16, 2018
Uprooting defects to enable high-performance III-V optoelectronic devices on silicon
Youcef A Bioud1, Abderraouf Boucherif2, Maksym Myronov3
1Laboratoire Nanotechnologies Nanosystèmes (LN2)-CNRS UMI-3463, Institut Interdisciplinaire d'Innovation Technologique (3IT), Université de Sherbrooke, 3000 Boulevard Université, Sherbrooke, J1K OA5, QC, Canada. Y.Bioud@USherbrooke.ca.
Abstract:
The monolithic integration of III-V compound semiconductor devices with silicon presents physical and technological challenges, linked to the creation of defects during the deposition process. Herein, a new defect elimination strategy in highly mismatched heteroepitaxy is demonstrated to achieve a ultra-low dislocation density, epi-ready Ge/Si virtual substrate on a wafer scale, using a highly scalable process. Dislocations are eliminated from the epilayer through dislocation-selective electrochemical deep etching followed by thermal annealing, which creates nanovoids that attract dislocations, facilitating their subsequent annihilation. The averaged dislocation density is reduced by over three orders of magnitude, from ~108 cm-2 to a lower-limit of ~104 cm-2 for 1.5 µm thick Ge layer. The optical properties indicate a strong enhancement of luminescence efficiency in GaAs grown on this virtual substrate. Collectively, this work demonstrates the promise for transfer of this technology to industrial-scale production of integrated photonic and optoelectronic devices on Si platforms in a cost-effective way.
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