Stateful Three-Input Logic with Memristive Switches

Area of Science:

• Materials Science
• Computer Engineering
• Electrical Engineering

Background:

• Memristive switches offer combined storage and computation capabilities, making them promising for next-generation computing beyond CMOS technology.
• Current memristive architectures face challenges in efficiency and complexity for advanced computational tasks.

Purpose of the Study:

• To propose a multi-input memristive switch logic gate for enhanced computational capabilities.
• To introduce a novel computing system architecture and clocking scheme optimized for memristive switching.
• To demonstrate the feasibility of integrating these components for complex operations like a 64-bit full adder.

Main Methods:

• Development of a multi-input memristive switch logic gate capable of performing the OR (Y NOR Z) function in a single step.
• Design of a synchronized system architecture with interconnected computational function blocks.
• Utilizing a physics-based model for simulating the ORNOR gate and a full adder circuit integrated into the proposed architecture.

Main Results:

• Successful single-step execution of the X OR (Y NOR Z) logic function using three memristive switches.
• Demonstration of a functional full adder using the proposed ORNOR gate within the novel system architecture.
• Simulation results validating the performance of a 64-bit full adder implemented in the memristive computing system.

Conclusions:

• The proposed multi-input memristive switch logic and system architecture significantly enhance the efficiency and capability of memristive-based computing.
• This advancement paves the way for more powerful and integrated beyond-CMOS computing solutions.
• The demonstrated 64-bit full adder highlights the practical potential of memristive devices in complex computational systems.