Search research articles

ABOUT JoVE

Overview Leadership Blog JoVE Help Center

AUTHORS

Publishing Process Editorial Board Scope & Policies Peer Review FAQ Submit

LIBRARIANS

Testimonials Subscriptions Access Resources Library Advisory Board FAQ

RESEARCH

JoVE Journal Methods Collections JoVE Encyclopedia of Experiments Archive

EDUCATION

JoVE Core JoVE Business JoVE Science Education JoVE Lab Manual Faculty Resource Center Faculty Site

Terms & Conditions of Use

Related Concept Videos

Types of Semiconductors

Types of Semiconductors

Intrinsic semiconductors are highly pure materials with no impurities. At absolute zero, these semiconductors behave as perfect insulators because all the valence electrons are bound, and the conduction band is empty, disallowing electrical conduction. The Fermi level is a concept used to describe the probability of occupancy of energy levels by electrons at thermal equilibrium. In intrinsic semiconductors, the Fermi level is positioned at the midpoint of the energy gap at absolute zero. When...

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by

Same author

On-chip optical pumping of nanowire emitters using transfer-printed micro-LEDs.

Nanotechnology·2026

Same author

Achieving 27.7% Efficiency with a Mechanically Stacked, Four-Terminal Perovskite/InGaAsP Tandem Solar Cell.

Small science·2026

Same author

Polarization-selective, tailorable, and flexible InP nanofilm UV photodetectors.

Nanoscale·2026

Same author

Low-Threshold InP Nanowire Hetero-Photonic Crystal Surface-Emitting Lasers.

ACS applied materials & interfaces·2026

Same author

Erratum:<i>In situ</i>passivation of GaAsSb nanowires for enhanced infrared photoresponse (2020<i>Nanotechnology</i>31 244002).

Nanotechnology·2025

Same author

High-Definition 3D Suspended Archimedean Spiral with Broadband, Spatially Extended, and Single-Handed Optical Chirality Enhancement in Vis-NIR Range.

Nano letters·2025

Search research articles

Related Experiment Video

Updated: Jan 5, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

Published on: December 7, 2017

Engineering III-V Semiconductor Nanowires for Device Applications.

Jennifer Wong-Leung¹, Inseok Yang¹, Ziyuan Li¹

¹Department of Electronic Materials Engineering, Research School of Physics and Engineering, The Australian National University, Canberra, ACT2601, Australia.

Advanced Materials (Deerfield Beach, Fla.)

|October 18, 2019

Summary

III-V semiconductor nanowires show promise for new devices due to their unique 1D structure. This review covers synthesis challenges, heterostructure growth, and applications in lasers, LEDs, solar cells, and water splitting.

Keywords:

lasers light-emitting diodes metal-organic chemical vapor deposition (MOCVD)scanning transmission electron microscopy semiconductor nanowires solar cells water splitting

More Related Videos

Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications

Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications

Published on: April 21, 2016

Analysis of Contact Interfaces for Single GaN Nanowire Devices

Analysis of Contact Interfaces for Single GaN Nanowire Devices

Published on: November 15, 2013

Related Experiment Videos

Last Updated: Jan 5, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

Published on: December 7, 2017

Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications

Preparation of Silicon Nanowire Field-effect Transistor for Chemical and Biosensing Applications

Published on: April 21, 2016

Analysis of Contact Interfaces for Single GaN Nanowire Devices

Analysis of Contact Interfaces for Single GaN Nanowire Devices

Published on: November 15, 2013

Area of Science:

Materials Science
Nanotechnology
Semiconductor Physics

Background:

III-V semiconductor nanowires possess unique properties due to their 1D geometry.
These properties enable the creation of complex quantum wells and heterostructures.
Radial and axial geometries offer advanced device design possibilities.

Purpose of the Study:

To review challenges in bottom-up nanowire synthesis.
To discuss the growth of axial and radial heterostructures.
To overview nanowire-based devices and water-splitting technologies.

Main Methods:

Overview of catalyst and catalyst-free bottom-up synthesis methods.
Review of techniques for growing axial and radial heterostructures.
Analysis of top-down approaches for water splitting.

Main Results:

Identified challenges in nanowire synthesis and heterostructure fabrication.
Highlighted the potential of III-V nanowires in lasers, light-emitting devices, and solar cells.
Reviewed top-down methods for water splitting applications.

Conclusions:

III-V semiconductor nanowires are crucial for next-generation devices.
Further research is needed to overcome synthesis challenges and optimize device performance.
Future directions include advanced heterostructure designs and novel applications.