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Optimized Fabrication Procedure for High-Quality Graphene-based Moiré Superlattice Devices
Published on: July 11, 2025
Wafer-Scale Synthesis of Graphene on Sapphire: Toward Fab-Compatible Graphene
Neeraj Mishra1,2, Stiven Forti1, Filippo Fabbri1,2
1Center for Nanotechnology Innovation @ NEST, Istituto Italiano di Tecnologia, Piazza San Silvestro 12, 56127, Pisa, Italy.
Abstract:
The adoption of graphene in electronics, optoelectronics, and photonics is hindered by the difficulty in obtaining high-quality material on technologically relevant substrates, over wafer-scale sizes, and with metal contamination levels compatible with industrial requirements. To date, the direct growth of graphene on insulating substrates has proved to be challenging, usually requiring metal-catalysts or yielding defective graphene. In this work, a metal-free approach implemented in commercially available reactors to obtain high-quality monolayer graphene on c-plane sapphire substrates via chemical vapor deposition is demonstrated. Low energy electron diffraction, low energy electron microscopy, and scanning tunneling microscopy measurements identify the Al-rich reconstruction ° of sapphire to be crucial for obtaining epitaxial graphene. Raman spectroscopy and electrical transport measurements reveal high-quality graphene with mobilities consistently above 2000 cm2 V-1 s-1 . The process is scaled up to 4 and 6 in. wafers sizes and metal contamination levels are retrieved to be within the limits for back-end-of-line integration. The growth process introduced here establishes a method for the synthesis of wafer-scale graphene films on a technologically viable basis.
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