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Area of Science:

  • Hardware implementation for machine learning
  • Neuromorphic engineering
  • Advanced memory technologies

Background:

  • Stochastic neural networks (SNNs) are state-of-the-art for machine learning, information theory, and statistics.
  • The core operation in SNNs is the stochastic dot-product.
  • Efficient hardware combining stochastic neurons and dot-product circuits is currently lacking.

Purpose of the Study:

  • To design and implement compact, fast, and energy-efficient stochastic dot-product circuits.
  • To leverage intrinsic and extrinsic noise in memory devices for efficient stochastic operations.
  • To enable dynamic weight scaling for improved neural network functionality.

Main Methods:

  • Developed mixed-signal stochastic dot-product circuits using metal-oxide memristors and embedded floating-gate memories.
  • Utilized inherent circuit noise for stochastic computations.
  • Implemented dynamic weight scaling with analog memory devices.

Main Results:

  • Demonstrated compact, fast, energy-efficient, and scalable stochastic dot-product circuits.
  • Achieved high performance through mixed-signal design and noise utilization.
  • Successfully verified the approach with a neural network for graph partitioning and a Boltzmann machine.

Conclusions:

  • The proposed circuits offer a viable hardware solution for stochastic neural networks.
  • This work advances the efficient implementation of SNNs for complex computational tasks.
  • The use of memristors and floating-gate memories paves the way for next-generation neuromorphic hardware.