Negative differential transconductance device with a stepped gate dielectric for multi-valued logic circuits.

Area of Science:

• Materials Science
• Electrical Engineering
• Computer Engineering

Background:

• Conventional complementary metal-oxide-semiconductor (CMOS) technology faces scaling and power density limitations.
• Multi-valued logic (MVL) offers a promising alternative for enhanced data handling and reduced power consumption in integrated circuits.

Purpose of the Study:

• To propose and investigate an ambipolar WSe2 field-effect transistor (NDTFET) with multiple negative-differential-transconductance (NDT) regions for MVL applications.
• To explore strategies for increasing NDT regions and engineering NDTFET characteristics.
• To demonstrate the adaptability of NDTFETs for ternary, quaternary, and quinary MVL inverters.

Main Methods:

• Device characterization using Kelvin probe force microscopy, electrical measurements, and capacitance-voltage measurements.
• Simulation of NDTFETs for various MVL inverter applications.
• Fabrication and verification of a ternary MVL inverter.

Main Results:

• Demonstrated an ambipolar WSe2 field-effect transistor (NDTFET) with multiple negative-differential-transconductance (NDT) regions.
• Successfully adapted NDTFETs for ternary, quaternary, and quinary MVL inverters through simulations.
• Experimentally verified the operation of a ternary MVL inverter using WSe2.

Conclusions:

• The proposed NDTFET concept using WSe2 is a viable and tunable approach for advanced MVL applications.
• This technology offers a pathway to overcome the limitations of conventional CMOS technology.
• The study highlights the potential of WSe2-based devices for future high-performance, low-power integrated circuits.