P-N junction
Metal-Semiconductor Junctions
Biasing of P-N Junction
Schottky Barrier Diode
Biasing of FET
Types of Semiconductors
You might also read
Articles linked to this work by shared authors, journal, and citation graph.
Updated: Dec 13, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Sara Fathipour1, Paolo Paletti1, Susan K Fullerton-Shirey2,3
1Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, 46556, USA.
This study demonstrates WSe2 p-i-n homojunctions with stable ideality factors over a wide current range. These electric double layer junctions utilize a polymer electrolyte for improved performance in 2D materials.
Area of Science:
Background:
Purpose of the Study:
Main Methods:
Main Results:
Conclusions: