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Capping Layers to Improve the Electrical Stress Stability of MoS2 Transistors
James L Doherty1, Steven G Noyce1, Zhihui Cheng1
1Department of Electrical and Computer Engineering, Duke University, Durham, North Carolina 27708, United States.
Abstract:
Two-dimensional (2D) materials offer exciting possibilities for numerous applications, including next-generation sensors and field-effect transistors (FETs). With their atomically thin form factor, it is evident that molecular activity at the interfaces of 2D materials can shape their electronic properties. Although much attention has focused on engineering the contact and dielectric interfaces in 2D material-based transistors to boost their drive current, less is understood about how to tune these interfaces to improve the long-term stability of devices. In this work, we evaluated molybdenum disulfide (MoS2) transistors under continuous electrical stress for periods lasting up to several days. During stress in ambient air, we observed temporary threshold voltage shifts that increased at higher gate voltages or longer stress durations, correlating to changes in interface trap states (ΔNit) of up to 1012 cm-2. By modifying the device to include either SU-8 or Al2O3 as an additional dielectric capping layer on top of the MoS2 channel, we were able to effectively reduce or even eliminate this unstable behavior. However, we found this encapsulating material must be selected carefully, as certain choices actually amplified instability or compromised device yield, as was the case for Al2O3, which reduced yield by 20% versus all other capping layers. Further refining these strategies to preserve stability in 2D devices will be crucial for their continued integration into future technologies.
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