A Low Power Sigma-Delta Modulator with Hybrid Architecture

Area of Science:

• Electrical Engineering
• Signal Processing
• Integrated Circuit Design

Background:

• Oversampling technology and Sigma-Delta modulation are crucial for modern digital audio systems.
• Existing audio modulators often face trade-offs between accuracy, power consumption, and complexity.
• High-performance analogue-to-digital converters (ADCs) are essential for high-fidelity audio applications.

Purpose of the Study:

• To present a novel audio modulator with high accuracy and low power consumption.
• To integrate a 5-bit successive approximation register (SAR) quantizer to reduce power and component count.
• To validate the design through fabrication in a 180 nm CMOS process.

Main Methods:

• Utilized a discrete second-order feedforward structure for the audio modulator.
• Incorporated a 5-bit SAR quantizer, reducing comparator count and power.
• Employed an analogue passive adder and a dynamic comparator within the SAR ADC architecture.

Main Results:

• Achieved a peak Signal-to-Noise Distortion Ratio (SNDR) of 106 dB.
• Measured a total power consumption of 3.654 mW at 1.8 V supply voltage.
• Demonstrated a 16-bit Effective Number of Bits (ENOB) for input signals from 0.15 V to 1.65 V.

Conclusions:

• The proposed audio modulator offers superior performance compared to existing designs in a 180 nm CMOS process.
• The integration of a SAR quantizer effectively reduces power consumption.
• The design achieves a compelling balance of high accuracy and low power for audio applications.