Wafer-scale fabrication of isolated luminescent silicon quantum dots using standard CMOS technology

A wafer-scale fabrication method for isolated silicon quantum dots (Si QDs) using standard CMOS technology is presented. Reactive ion etching was performed on the device layer of a silicon-on-insulator wafer, creating nano-sized silicon islands. Subsequently, the wafer was annealed at 1100 °C for 1 h in an atmosphere of 5% H₂ in Ar, forming a thin oxide passivating layer due to trace amounts of oxygen. Isolated Si QDs covering large areas (∼mm²) were revealed by photoluminescence (PL) measurements. The emission energies of such Si QDs can span over a broad range, from 1.3 to 2.0 eV and each dot is typically characterized by a single emission line at low temperatures. Most of the Si QDs exhibited a high degree of linear polarization along Si crystallographic directions [[Formula: see text]] and [[Formula: see text]]. In addition, system resolution-limited (250 μeV) PL linewidths (full width at half maximum) were measured for several Si QDs at 10 K, with no clear correlation between emission energy and polarization. The initial part of PL decays was measured at room temperature for such oxide-embedded Si QDs, approximately several microseconds long. By providing direct access to a broad size range of isolated Si QDs on a wafer, this technique paves the way for the future fabrication of photonic structures with Si QDs, which can potentially be used as single-photon sources with a long coherence length.