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Large Scale Energy Efficient Sensor Network Routing Using a Quantum Processor Unit

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ParRouting: An Efficient Area Partition-Based Congestion-Aware Routing Algorithm for NoCs.

Juan Fang¹, Di Zhang¹, Xiaqing Li¹

¹Faculty of Information Technology, Beijing University of Technology, Beijing 100124, China.

|December 1, 2020

Summary

This summary is machine-generated.

ParRouting, an area partition-based congestion-aware routing algorithm for Networks-on-Chip (NoC), significantly reduces packet latency and boosts throughput. This novel approach optimizes routing decisions by dividing the network into distinct areas.

Keywords:

adaptive routing congestion-aware load-balance networks-on-chip

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Area of Science:

Computer Engineering
VLSI Design
Parallel Computing

Background:

Routing algorithms are crucial for Networks-on-Chip (NoC) performance.
Existing regional congestion-aware algorithms improve NoC performance but introduce significant queuing latency.
This latency degrades overall NoC system efficiency.

Purpose of the Study:

To propose ParRouting, an efficient area partition-based congestion-aware routing algorithm for NoC systems.
To enhance NoC system throughput and reduce packet latency.
To address the limitations of existing congestion-aware routing algorithms.

Main Methods:

ParRouting partitions the NoC into two areas: edge and central, based on node priorities.
For the edge area, output node selection prioritizes higher throughput.
For the central area, output node selection prioritizes lower queuing latency by choosing low-congestion directions.

Main Results:

ParRouting achieved a 53.4% reduction in average packet latency on the SPLASH-2 ocean application.
Saturated throughput improved by up to 38.81% on a synthetic traffic pattern.
Demonstrated superior performance compared to existing routing algorithms in NoC systems.

Conclusions:

ParRouting effectively reduces latency and increases throughput in NoC systems.
The area partition strategy offers an efficient method for congestion-aware routing.
ParRouting presents a promising solution for high-performance NoC design.