Related Experiment Video
Updated: Nov 23, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Doping-Free All PtSe2 Transistor via Thickness-Modulated Phase Transition
Tanmoy Das1, Eunyeong Yang1, Jae Eun Seo1
1Department of Electrical and Computer Engineering, Ulsan National Institute of Science and Technology (UNIST), Ulsan 44919, South Korea.
This study introduces all-Platinum Diselenide (PtSe2) field-effect transistors (FETs) with integrated metallic contacts. This novel approach overcomes Fermi level pinning and doping challenges in 2D semiconductors, enhancing device performance.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Achieving high-quality metal contacts on 2D semiconductors is hindered by Fermi level pinning and lack of doping.
- Conventional methods often struggle with interface issues, limiting device performance.
Purpose of the Study:
- To demonstrate high-performance field-effect transistors (FETs) using an all-Platinum Diselenide (PtSe2) platform.
- To overcome limitations of Fermi level pinning and doping in 2D semiconductor devices.
Main Methods:
- Vertical integration of metallic thick PtSe2 source/drain onto a semiconducting ultrathin PtSe2 channel.
- Utilizing the thickness-dependent semiconductor-to-metal phase transition of PtSe2.
Main Results:
- Developed high-performance "all-PtSe2" FETs without Fermi level pinning or doping issues.
- Achieved excellent gate tunability, superior mobility, and high ON current.
- Demonstrated one order lower contact resistance compared to conventional Ti/Au contacts.
Conclusions:
- The developed PtSe2 van der Waals (vdW) contact offers a new device paradigm for 2D nanoelectronics.
- This approach overcomes a fundamental bottleneck in creating efficient contacts for 2D materials.
- Fully metallized source/drain and semiconducting channels are realized on a single PtSe2 platform.
Related Concept Videos
Biasing of Metal-Semiconductor Junctions
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
MOSFET: Enhancement Mode
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
MOSFET: Depletion Mode
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity...
Bipolar Junction Transistor
Switching of BJT
Cut-off Mode ("Off" State): In this state, both the emitter-base and collector-base junctions are...
Biasing of P-N Junction
In equilibrium, no external voltage is applied across the p-n junction. The depletion region is formed at the junction interface due to the diffusion of carriers, which leaves behind charged dopants, acceptors on the p-side, and donors on the n-side. These immobile charges create an electric field that prevents further diffusion of carriers. The related energy band...

