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Quantized Convolutional Neural Network Implementation on a Parallel-Connected Memristor Crossbar Array for Edge AI

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  • 1College of Electrical and Computer Engineering, Chungbuk National University, Cheongju, 28644, S. Korea.

Journal of Nanoscience and Nanotechnology
|January 6, 2021
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Summary
This summary is machine-generated.

This study introduces a novel radix-5 convolutional neural network (CNN) using parallel 1-bit memristors for efficient hardware implementation. This approach significantly reduces hardware area while maintaining high classification accuracy for edge-AI applications.

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Area of Science:

  • * Hardware implementation of neural networks
  • * Nanoscale memristor crossbar arrays
  • * Edge Artificial Intelligence (e-AI)

Background:

  • * Challenges exist in implementing analog neural network cells using nanoscale memristor crossbar arrays due to noise margin and variability issues.
  • * Multi-state memristors are difficult to control, impacting the reliability of neural network hardware.
  • * Existing solutions often require complex designs and may not be suitable for resource-constrained edge devices.

Purpose of the Study:

  • * To propose a novel hardware architecture for neural networks using 1-bit memristors.
  • * To develop a radix-5 convolutional neural network (CNN) implementation on a memristor crossbar array.
  • * To demonstrate the feasibility and performance of this implementation on an edge-AI platform.

Main Methods:

  • * Utilized 1-bit memristors (storing binary states: high-resistance state (HRS) and low-resistance state (LRS)) in a parallel architecture (4-parallel 1-bit memristors per crosspoint) to represent 5 decimal values (radix-5).
  • * Developed a quantized weight mapping model for a CNN using TensorFlow, simulating the radix-5 architecture.
  • * Implemented and verified the radix-5 CNN on a field-programmable gate array (FPGA) based edge-AI platform, including a method for negative weight representation.

Main Results:

  • * The radix-5 CNN demonstrated learning results nearly identical to high-precision CNN models.
  • * Hardware implementation on FPGA showed comparable classification accuracy to high-precision use cases on a dataset of 4x4 images.
  • * Achieved a reduction in the memristor crossbar array area by half compared to conventional approaches.

Conclusions:

  • * The proposed parallel 1-bit memristor architecture offers an efficient solution for implementing neural networks on memristor crossbar arrays.
  • * The radix-5 CNN implementation on an FPGA-based e-AI platform is viable and achieves competitive performance.
  • * This work contributes to the practical application of memristor-based neural networks in edge-AI devices.