Raised Source/Drain (RSD) and Vertical Lightly Doped Drain (LDD) Poly-Si Thin-Film Transistor

Area of Science:

• Semiconductor Device Physics
• Materials Science

Background:

• Raised source/drain (RSD) structures are employed in thin film transistors to enhance device performance.
• High electric fields at the drain side contribute to impact ionization, degrading device characteristics.
• Existing research suggests RSD can disperse drain electric fields, mitigating ionization.

Purpose of the Study:

• To investigate the effectiveness of a vertical lightly doped drain (LDD) scheme in reducing drain-side electric fields within RSD devices.
• To compare the performance of RSD structures with and without integrated LDD schemes.
• To analyze the impact of varying source/drain thicknesses and doping profiles on electric field distribution.

Main Methods:

• Utilized Integrated Systems Engineering (ISE-TCAD) simulators for device simulations.
• Modeled various raised source/drain configurations, including different thicknesses and doping profiles.
• Simulated electric field distribution and output characteristics for each device design.

Main Results:

• The electric fields in traditional devices and uniform doping RSD structures were comparable (~2.9 × 10^5 V/cm).
• Implementing a vertical LDD scheme within the RSD structure reduced the maximum drain electric field to approximately 2 × 10^5 V/cm.
• RSD structures without an integrated vertical LDD design showed no significant improvement in device characteristics.

Conclusions:

• A vertical LDD scheme is crucial for effectively reducing drain-side electric fields in RSD thin film transistors.
• The mere presence of a raised source/drain structure is insufficient for performance enhancement; it requires complementary LDD integration.
• Optimized LDD integration within RSD designs offers a viable pathway to improved thin film transistor performance.