Universal Verification Platform and Star Simulator for Fast Star Tracker Design.

Area of Science:

• Aerospace Engineering
• Computer Science

Background:

• Developing star trackers rapidly and ensuring reproducible results are significant challenges in aerospace.
• Comparing diverse star tracker algorithms requires standardized verification methods.

Purpose of the Study:

• To propose a design approach using synthetic star images and the Universal Verification Methodology (UVM) to streamline star tracker development.
• To enhance project organization, accelerate development timelines, and minimize future rework.

Main Methods:

• Utilizing a simulated sky (synthetic star images) within a UVM framework for a standardized design approach.
• Developing a black-box verification platform with standard interfaces, released under a free software license.
• Applying object-oriented principles within UVM to enforce code reusability.

Main Results:

• Demonstrated application of the methodology to a small satellite star tracker system-on-a-chip design.
• Successfully reused test benches across software-only and hardware-in-the-loop (HITL) hybrid systems, showcasing regression testing capabilities.
• Employed the simulator to inject noise for evaluating system performance under realistic conditions.

Conclusions:

• The proposed approach significantly speeds up star tracker development and improves result reproducibility.
• The UVM-based verification platform and reusable test benches reduce development costs and future maintenance.
• This methodology is effective for both conceptual and optimized hardware-software integrated systems for small satellites.