A field programmable gate array based high speed real-time weak periodic signal detection technique.

Area of Science:

• Signal Processing
• Embedded Systems Engineering
• Digital Electronics

Background:

• Real-time detection of weak signals at high repetition rates presents significant challenges.
• Existing methods often require high-speed analog-to-digital converters (ADCs) and computationally intensive processing.
• Minimizing computational complexity while maintaining high sampling rates is crucial for practical applications.

Purpose of the Study:

• To develop a novel Field Programmable Gate Array (FPGA) based technique for high-speed, real-time weak signal detection.
• To address the limitations of traditional ADCs and processing methods in weak signal analysis.
• To improve sampling rates and computational efficiency in weak signal detection systems.

Main Methods:

• Implementation of a one-bit analog-to-digital converter (ADC) using cascaded comparators and flip-flops for quantization-first sampling.
• Design of a time-interleaved structure with multiple sub-channels to enhance the overall sampling rate without calibration.
• Integration of a coherent integration structure within each sub-channel for effective data accumulation.
• Development of a full layer clearance mechanism to mitigate noise baseline drift effects with low computational complexity.

Main Results:

• A prototype system with three sub-channels achieved a sampling rate of 1.5 Gs/s.
• The proposed technique demonstrated high sampling rates suitable for high-speed signal detection.
• The system exhibited significant tolerance to noise baseline drift, outperforming traditional adaptive threshold methods.
• The implemented full layer clearance mechanism proved effective and computationally efficient.

Conclusions:

• The novel FPGA-based technique offers a viable solution for high-speed, real-time weak signal detection.
• The one-bit ADC and time-interleaved architecture significantly boost sampling rates and reduce calibration needs.
• The proposed noise baseline drift mitigation strategy enhances detection reliability and computational efficiency.