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Published on: March 9, 2019
Characterization and Programming Algorithm of Phase Change Memory Cells for Analog In-Memory Computing.
Alessio Antolini1, Eleonora Franchi Scarselli1, Antonio Gnudi1
1Electrical, Electronic and Information Engineering Department "Guglielmo Marconi", University of Bologna, Viale Risorgimento 2, 40123 Bologna, Italy.
This study optimizes phase-change memory (PCM) cells for analog in-memory computing (AIMC). Strategies were developed to minimize noise and variability, improving PCM device performance for AIMC applications.
Area of Science:
- Materials Science
- Electrical Engineering
- Computer Engineering
Background:
- Phase-change memory (PCM) cells are crucial for analog in-memory computing (AIMC).
- PCM devices face challenges like noise, drift, and variability, hindering analog applications.
- Optimizing PCM performance is essential for advancing AIMC technology.
Purpose of the Study:
- To thoroughly characterize phase-change memory (PCM) cells for analog in-memory computing (AIMC).
- To evaluate and optimize PCM cell performance by reducing detrimental phenomena.
- To propose and assess an algorithm for multi-level cell conductance programming in PCM devices.
Main Methods:
- Characterization of embedded PCM (ePCM) cells using Ge-rich Ge-Sb-Te (GST) alloy.
- Analysis of programming pulse features to mitigate low-frequency noise, time drift, and cell-to-cell variability.
- Development and testing of an iterative algorithm for multi-level conductance programming.
Main Results:
- Demonstrated strategies to reduce noise, drift, and variability in PCM cells.
- An iterative algorithm enabled multi-level conductance programming for 512 cells.
- Achieved initial conductance spread under 6%, noise <9%, and drift <15% over 14 hours.
Conclusions:
- Optimized PCM cells show promising performance for AIMC applications.
- The proposed algorithm effectively supports multi-level programming in PCM devices.
- PCM technology, when optimized, can overcome key limitations for analog computing.
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