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Interlayer exchange couple based reliable and robust 3-input adder design methodology
Venkat Mattela1, Sanghamitra Debroy1, Santhosh Sivasubramani1
1Advanced Embedded Systems and IC Design Laboratory, Department of Electrical Engineering, Indian Institute of Technology, Hyderabad, India.
Abstract:
In this paper, a novel inter-layer exchange coupled (IEC) based 3-input full adder design methodology is proposed and subsequently the architecture has been implemented on the widely accepted micromagnetic OOMMF platform. The impact of temperature on the IEC coupled full-adder design has been analyzed up to Curie temperature. It was observed that even up to Curie temperature the IEC based adder design was able to operate at sub-50 nm as contrast to dipole coupled adder design which failed at 5 K for sub 50 nm. Simulation results obtained from OOMMF micromagnetic simulator shows, the IEC based adder design was at a lower energy state as compared to the dipole coupled adder indicating a more stable system and as the temperature of the design was increased, the total energy increased resulting in reduced stability. Potential explanation for the thermodynamic stability of IEC model lies in its energetically favored architecture, such that the total energy was lower than its dipole coupled counterparts. IEC architecture demonstrates supremacy in reliability and strength enabling NML to march towards beyond CMOS devices.
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