Related Experiment Video
Updated: Nov 6, 2025

Design and Characterization Methodology for Efficient Wide Range Tunable MEMS Filters
Published on: February 4, 2018
Analysis and Reduction of Nonlinear Distortion in AC-Coupled CMOS Neural Amplifiers with Tunable Cutoff Frequencies
Beata Trzpil-Jurgielewicz1, Władysław Dąbrowski1, Paweł Hottowy1
1Faculty of Physics and Applied Computer Science, AGH University of Science and Technology, 30-059 Kraków, Poland.
Abstract:
Integrated CMOS neural amplifiers are key elements of modern large-scale neuroelectronic interfaces. The neural amplifiers are routinely AC-coupled to electrodes to remove the DC voltage. The large resistances required for the AC coupling circuit are usually realized using MOSFETs that are nonlinear. Specifically, designs with tunable cutoff frequency of the input high‑pass filter may suffer from excessive nonlinearity, since the gate-source voltages of the transistors forming the pseudoresistors vary following the signal being amplified. Consequently, the nonlinear distortion in such circuits may be high for signal frequencies close to the cutoff frequency of the input filter. Here we propose a simple modification of the architecture of a tunable AC-coupled amplifier, in which the bias voltages V of the transistors forming the pseudoresistor are kept constant independently of the signal levels, what results in significantly improved linearity. Based on numerical simulations of the proposed circuit designed in 180 nm technology we analyze the Total Harmonic Distortion levels as a function of signal frequency and amplitude. We also investigate the impact of basic amplifier parameters-gain, cutoff frequency of the AC coupling circuit, and silicon area-on the distortion and noise performance. The post-layout simulations of the complete test ASIC show that the distortion is very significantly reduced at frequencies near the cutoff frequency, when compared to the commonly used circuits. The THD values are below 1.17% for signal frequencies 1 Hz-10 kHz and signal amplitudes up to 10 mV peak-to-peak. The preamplifier area is only 0.0046 mm2 and the noise is 8.3 µVrms in the 1 Hz-10 kHz range. To our knowledge this is the first report on a CMOS neural amplifier with systematic characterization of THD across complete range of frequencies and amplitudes of neuronal signals recorded by extracellular electrodes.
More Related Videos
11:44Real-Time DC-dynamic Biasing Method for Switching Time Improvement in Severely Underdamped Fringing-field Electrostatic MEMS Actuators
Published on: August 15, 2014
07:51Voltage Biasing, Cyclic Voltammetry, & Electrical Impedance Spectroscopy for Neural Interfaces
Published on: February 24, 2012
Related Concept Videos
Small-Signal Analysis of MOSFET Amplifiers
MOSFET Amplifiers
Op Amp AC Circuits
Small-Signal Analysis of BJT Amplifiers
Biasing of FET
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
Frequency Response of BJT
Low-Frequency Response: At low frequencies, the behavior of the BJT is determined by its DC bias point, which is set by the...