Pristine Graphene Insertion at the Metal/Semiconductor Interface to Minimize Metal-Induced Gap States

Area of Science:

• Materials Science
• Condensed Matter Physics
• Electrical Engineering

Background:

• Metal contacts on semiconductors create problematic metal-induced gap states (MIGS).
• These MIGS hinder the investigation of intrinsic semiconductor electrical properties.
• Previous attempts using metal/graphene (M/Gr) bilayers faced challenges with interfacial contamination.

Purpose of the Study:

• To demonstrate atomically clean metal/graphene/silicon (M/Gr/Si) junctions.
• To investigate the impact of a graphene interlayer on M/Si electrical contact properties.
• To explore methods for suppressing MIGS and studying intrinsic semiconductor characteristics.

Main Methods:

• All-dry transfer technique for fabricating M/Gr bilayers on n-type silicon (Si).
• Fabrication of M/Si junctions without a Gr interlayer for comparison.
• Electrical characterization of M/Gr/Si and M/Si junctions, focusing on current density (J) at reverse bias.

Main Results:

• Atomically clean M/Gr/Si junctions were successfully fabricated.
• The M/Gr/Si junctions exhibited a significant increase in reverse current density (up to 10^5 times for Au/Gr/Si(111) compared to Au/Si).
• The graphene interlayer's effect on reverse current was more pronounced on Si(111) than Si(100), correlating with different Fermi-level pinning behaviors.

Conclusions:

• An all-dry transfer of M/Gr bilayers effectively suppresses MIGS at M/Si interfaces.
• The clean graphene interlayer enables enhanced reverse current density, facilitating the study of intrinsic semiconductor properties.
• This approach offers a pathway to overcome limitations in studying semiconductor materials.