Neuromorphic Time-Multiplexed Reservoir Computing With On-the-Fly Weight Generation for Edge Devices

Area of Science:

• Neuromorphic Engineering
• Artificial Intelligence
• Edge Computing

Background:

• The human brain performs complex cognitive tasks efficiently with low power.
• Existing hardware struggles with power consumption and resource limitations for edge AI tasks.
• Temporal data classification, like speech recognition, demands significant computational resources.

Purpose of the Study:

• To propose a low-power neuromorphic hardware architecture for edge classification of temporal data.
• To adapt reservoir computing for efficient, on-the-fly hardware implementation.
• To validate the architecture for speech and human activity recognition (HAR) tasks.

Main Methods:

• Developed a neuromorphic cochlea model for feature extraction.
• Modified the reservoir computing (RC) framework with on-the-fly reservoir connectivity and binary weights.
• Split large reservoirs into multiple smaller ones to optimize hardware resource utilization.
• Prototyped the architecture on an Intel Cyclone-10 FPGA.

Main Results:

• The proposed architecture significantly reduces computational and memory requirements, leading to a lower power budget.
• The hardware prototype for classification consumed only 4790 logic elements (LEs) and 34.9-kB memory.
• A complete speech recognition system utilized 15,532 LEs and 38.4-kB memory.
• Achieved an order-of-magnitude reduction in power consumption and memory usage compared to existing FPGA models for similar speech recognition tasks.

Conclusions:

• The proposed neuromorphic hardware architecture offers a power-efficient solution for edge AI applications.
• The novel RC modifications and reservoir splitting enable significant resource savings.
• This approach is highly suitable for deploying complex AI tasks, such as speech recognition, at the edge.