Correction: 12-state multi-level cell storage implemented in a 128 Mb phase change memory chip.

Zhitang Song1, Daolin Cai1, Yan Cheng2

  • 1State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China. ztsong@mail.sim.ac.cn caidl@mail.sim.ac.cn.

Nanoscale
|June 17, 2021
PubMed
Summary

This correction clarifies the implementation of 12-state multi-level cell storage in a 128 Mb phase change memory chip. It ensures accurate reporting of advanced data storage technologies in nanoscale devices.

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