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Updated: Oct 23, 2025

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy
Published on: April 8, 2018
Interlayer engineering for enhanced ferroelectric tunnel junction operations in HfO-based
Kyung Kyu Min1,2, Junsu Yu1, Yeonwoo Kim1
1Inter-University Semiconductor Research Center, Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-744, Republic of Korea.
Interlayer engineering in ferroelectric tunnel junctions (FTJs) using an Al2O3 layer significantly enhances device performance. This boosts read disturbance immunity, endurance, and reduces cell variation for next-generation low-power memory devices.
Area of Science:
- Materials Science
- Electrical Engineering
- Nanotechnology
Background:
- Ferroelectric tunnel junctions (FTJs) offer potential for non-destructive, low-power memory devices.
- Optimizing FTJ performance is crucial for advancing next-generation electronics.
Purpose of the Study:
- To investigate the impact of interlayer (IL) engineering on FTJ device performance.
- To enhance read disturbance immunity, endurance, and cell-to-cell variation in FTJs.
Main Methods:
- Fabrication of FTJs with engineered IL stacks, specifically inserting an Al2O3 layer.
- Analysis of material and electrical characteristics of the fabricated FTJs.
- Characterization of ferroelectricity and polarization switching speeds.
Main Results:
- Insertion of an Al2O3 IL layer improved read disturbance (2Vc increased to 2.2 V).
- Achieved a tenfold improvement in endurance characteristics.
- Reduced cell-to-cell TER variation without degrading ferroelectricity (<5%) or switching speeds.
Conclusions:
- IL engineering, particularly with Al2O3, is an effective strategy to boost FTJ performance.
- Provides guidelines for IL engineering to achieve stable and fast low-power ferroelectric memory operations.
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