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Deconvolution01:20

Deconvolution

326
Deconvolution, also known as inverse filtering, is the process of extracting the impulse response from known input and output signals. This technique is vital in scenarios where the system's characteristics are unknown, and they must be inferred from the observable signals.
Deconvolution involves several mathematical techniques to derive the impulse response. One common approach is polynomial division. In this method, the input and output sequences are treated as coefficients of...
326
Convolution: Math, Graphics, and Discrete Signals01:24

Convolution: Math, Graphics, and Discrete Signals

504
In any LTI (Linear Time-Invariant) system, the convolution of two signals is denoted using a convolution operator, assuming all initial conditions are zero. The convolution integral can be divided into two parts: the zero-input or natural response and the zero-state or forced response, with t0 indicating the initial time.
To simplify the convolution integral, it is assumed that both the input signal and impulse response are zero for negative time values. The graphical convolution process...
504
Multi-input and Multi-variable systems01:22

Multi-input and Multi-variable systems

206
Cruise control systems in cars are designed as multi-input systems to maintain a driver's desired speed while compensating for external disturbances such as changes in terrain. The block diagram for a cruise control system typically includes two main inputs: the desired speed set by the driver and any external disturbances, such as the incline of the road. By adjusting the engine throttle, the system maintains the vehicle's speed as close to the desired value as possible.
In the absence...
206
Convolution Properties II01:17

Convolution Properties II

335
The important convolution properties include width, area, differentiation, and integration properties.
The width property indicates that if the durations of input signals are T1 and T2, then the width of the output response equals the sum of both durations, irrespective of the shapes of the two functions. For instance, convolving two rectangular pulses with durations of 2 seconds and 1 second results in a function with a width of 3 seconds.
The area property asserts that the area under the...
335
Convolution Properties I01:20

Convolution Properties I

296
Convolution computations can be simplified by utilizing their inherent properties.
The commutative property reveals that the input and the impulse response of an LTI (Linear Time-Invariant) system can be interchanged without affecting the output:
296
Integrator and Differentiator01:13

Integrator and Differentiator

1.1K
Op-amp circuits have significant applications in various fields, including automotive engineering. One such application is cruise control systems in cars, where op-amp circuits are integral for maintaining a constant speed. In these systems, op-amps function as both integrators and differentiators.
An integrator within an op-amp circuit produces an output directly proportional to the integral of the input signal. This is achieved by replacing the feedback resistor in a typical inverting...
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Related Experiment Video

Updated: Oct 22, 2025

Microfluidic Platform with Multiplexed Electronic Detection for Spatial Tracking of Particles
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Efficient Deconvolution Architecture for Heterogeneous Systems-on-Chip.

Stefania Perri1, Cristian Sestito2, Fanny Spagnolo2

  • 1Department of Mechanical, Energy and Management Engineering, University of Calabria, 87036 Rende, Italy.

Journal of Imaging
|August 30, 2021
PubMed
Summary
This summary is machine-generated.

This study introduces a novel hardware accelerator for 2D deconvolutions, significantly improving performance and reducing power consumption in embedded systems for deep learning tasks.

Keywords:
Field-Programmable Gate Array (FPGA)Generative Adversarial Networks (GANs)heterogeneous embedded systemsimage deconvolution

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Area of Science:

  • Computer Engineering
  • Artificial Intelligence
  • Hardware Acceleration

Background:

  • Convolutional and deconvolutional neural networks are vital for computer vision but demand high computational power and memory.
  • Designing efficient hardware architectures for these networks, especially for resource-constrained embedded systems, remains a significant challenge.
  • Existing solutions struggle with high complexity and memory requirements, hindering widespread adoption.

Purpose of the Study:

  • To present a novel, purpose-designed hardware accelerator specifically for 2D deconvolutions.
  • To overcome the computational and memory limitations of traditional deconvolution methods.
  • To enable efficient deployment of deconvolutional neural networks in embedded systems.

Main Methods:

  • Developed a hardware-oriented computational approach for 2D deconvolutions.
  • Designed a scalable architecture suitable for Field-Programmable Gate Array (FPGA) based System-on-Chip (SoC) devices.
  • Implemented and evaluated the accelerator on Xilinx Zynq XC7Z020 and Virtex-7 XC7VX690T devices.

Main Results:

  • The accelerator achieves up to 72 GOPs on a standalone Xilinx Zynq XC7Z020, consuming less than 500mW@200MHz.
  • An embedded system with the accelerator performs up to 54 GOPs and dissipates less than 1.8W@150MHz.
  • Achieved over 900 GOPs on a Virtex-7 device and demonstrated superior performance and resource efficiency compared to state-of-the-art competitors.

Conclusions:

  • The proposed hardware accelerator offers a scalable and efficient solution for 2D deconvolutions in embedded systems.
  • It significantly enhances computational capability while reducing power consumption and logic resource utilization.
  • The design is suitable for both high- and low-end FPGA-based devices, paving the way for advanced AI applications in edge computing.