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Area efficient camouflaging technique for securing IC reverse engineering.

Md Liakot Ali1, Md Ismail Hossain1, Fakir Sharif Hossain2

  • 1Institute of Information and Communication Technology, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh.

Plos One
|November 4, 2021
PubMed
Summary
This summary is machine-generated.

This study introduces an efficient integrated circuit (IC) camouflaging technique to prevent reverse engineering. The novel method enhances security and reduces revenue loss in the semiconductor industry.

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Area of Science:

  • Electrical Engineering
  • Computer Engineering
  • Semiconductor Manufacturing

Background:

  • Reverse engineering poses a significant threat to the semiconductor industry, causing billions in annual revenue loss.
  • Existing methods for combating integrated circuit (IC) reverse engineering are often inefficient or lack robust security.
  • Protecting intellectual property in IC design is crucial for maintaining market competitiveness and preventing financial losses.

Purpose of the Study:

  • To propose an area-efficient and high-performance IC camouflaging technique at the physical design level.
  • To develop a novel camouflaging method that hinders attackers from identifying logic gates in IC layouts.
  • To introduce a library of camouflaged primitive gates using metal routing and dummy contact techniques for enhanced security.

Main Methods:

  • Implementation of an area-efficient, high-performance IC camouflaging technique.
  • Utilizing a combination of metal routing and dummy contact techniques to create camouflaged primitive gates.
  • Development of a gate library incorporating these camouflaged gates for physical design.

Main Results:

  • The proposed camouflaging technique effectively obscures logic gates, making reverse engineering difficult for attackers.
  • The developed gate library demonstrates superior performance compared to existing methods in terms of resource utilization, area, and delay.
  • The technique offers an optimal balance between security enhancement and performance overhead.

Conclusions:

  • The proposed IC camouflaging technique provides a robust solution against reverse engineering in the semiconductor industry.
  • The developed library of camouflaged gates is expected to be open-sourced, aiding ASIC designers in securing IC designs.
  • This work contributes to mitigating significant revenue losses caused by IC reverse engineering.