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Updated: Oct 12, 2025

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
Published on: December 7, 2017
Bottom-up nanoscale patterning and selective deposition on silicon nanowires
Amar T Mohabir1, Daniel Aziz1, Amy C Brummer2
1Georgia Institute of Technology, School of Chemical & Biomolecular Engineering, 30332, GA, United States of America.
Abstract:
We demonstrate a bottom-up process for programming the deposition of coaxial thin films aligned to the underlying dopant profile of semiconductor nanowires. Our process synergistically combines three distinct methods-vapor-liquid-solid nanowire growth, selective coaxial lithography via etching of surfaces (SCALES), and area-selective atomic layer deposition (AS-ALD)-into a cohesive whole. Here, we study ZrO2on Si nanowires as a model system. Si nanowires are first grown with an axially modulated n-Si/i-Si dopant profile. SCALES then yields coaxial poly(methyl methacrylate) (PMMA) masks on the n-Si regions. Subsequent AS-ALD of ZrO2occurs on the exposed i-Si regions and not on those masked by PMMA. We show the spatial relationship between nanowire dopant profile, PMMA masks, and ZrO2films, confirming the programmability of the process. The nanoscale resolution of our process coupled with the plethora of available AS-ALD chemistries promises a range of future opportunities to generate structurally complex nanoscale materials and electronic devices using entirely bottom-up methods.

