Energy-efficient transistors: suppressing the subthreshold swing below the physical limit.

Area of Science:

• Materials Science
• Electrical Engineering
• Semiconductor Physics

Background:

• Miniaturization of silicon-based electronics faces power consumption issues in micro-nano circuits.
• Conventional transistors are limited by the Boltzmann Tyranny, requiring at least 60 mV per decade for current modulation, hindering voltage scaling.
• This limitation necessitates the development of new transistor architectures to reduce power consumption.

Purpose of the Study:

• To analytically formulate subthreshold swing (SS).
• To summarize methods for reducing SS.
• To propose and review four novel transistor concepts for reduced power consumption.

Main Methods:

• Analytical formulation of subthreshold swing (SS).
• Review of existing methods for SS reduction.
• Analysis of physical mechanisms, optimization, potential, and drawbacks of new transistor concepts.

Main Results:

• Identified Boltzmann Tyranny as a key limitation in conventional transistors.
• Proposed four novel transistor architectures: Tunnel FETs, Negative Capacitance FETs, Impact Ionization FETs, and Cold Source FETs.
• Evaluated the potential and drawbacks of these steep-slope transistors.

Conclusions:

• Novel transistor designs offer solutions to overcome the Boltzmann Tyranny.
• These steep-slope transistors can significantly lower supply voltage and reduce power consumption.
• Further research and development are crucial to address challenges and realize the potential of these advanced transistors.