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Real-time FPGA-based implementation of the AKAZE algorithm with nonlinear scale space generation using image

Parastoo Soleimani1, David W Capson1, Kin Fun Li1

  • 1Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC V8W 2Y2 Canada.

Journal of Real-Time Image Processing
|December 6, 2021
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Summary
This summary is machine-generated.

This study introduces a hardware architecture for the AKAZE (Accelerated-KAZE) nonlinear scale space generation algorithm. The proposed FPGA design accelerates image processing for real-time applications, significantly improving performance.

Keywords:
AKAZEFPGAHardware designImage matchingNonlinear scale spaceReal-time

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Area of Science:

  • Computer Vision
  • Image Processing
  • Hardware Architecture

Background:

  • Scale space generation is crucial for image matching.
  • Nonlinear methods like AKAZE preserve image details across scales.
  • Real-time applications demand efficient algorithms.

Purpose of the Study:

  • To propose an FPGA-based hardware architecture for AKAZE nonlinear scale space generation.
  • To accelerate the AKAZE algorithm for real-time image processing.
  • To enhance the efficiency and performance of scale space generation.

Main Methods:

  • Mapping the two passes of the AKAZE algorithm onto a parallel hardware architecture.
  • Implementing multi-scale line buffers for flexible scale processing.
  • Utilizing a time-sharing mechanism in memory management for parallel section processing.
  • Employing algorithmic approximations for hardware efficiency while maintaining detection repeatability.

Main Results:

  • Achieved a frame rate of 304 frames per second for a specific image resolution.
  • Demonstrated parallel processing of multiple image sections.
  • Successfully prevented artifacts through the proposed memory management strategy.
  • Outperformed existing hardware implementations in terms of speed.

Conclusions:

  • The proposed FPGA architecture significantly accelerates AKAZE nonlinear scale space generation.
  • The design enables real-time image processing with high frame rates.
  • This work offers an efficient hardware solution for advanced image matching systems.