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    Area of Science:

    • Neuroscience
    • Computer Engineering
    • Signal Processing

    Background:

    • Accurate spike sorting is crucial for analyzing neural data.
    • Existing methods face challenges in accuracy and computational efficiency.

    Purpose of the Study:

    • To develop an efficient spike sorting processor with high clustering accuracy.
    • To implement a novel spike sorting algorithm in hardware.

    Main Methods:

    • Utilized an L2-normalized convolutional autoencoder for feature extraction.
    • Employed a similarity-based K-means clustering algorithm with cosine similarity.
    • Designed an efficient time-multiplexed hardware architecture in 40-nm CMOS.

    Main Results:

    • Achieved 95.54% clustering accuracy, outperforming previous designs.
    • Processor power consumption is 224.75μW/mm² at 7.68 MHz and 0.55 V for 16 channels.
    • Demonstrated improved convergence and online clustering capabilities.

    Conclusions:

    • The proposed spike sorting processor offers a significant advancement in neural signal processing hardware.
    • The novel algorithm and hardware co-design enable high-accuracy, low-power neural data analysis.