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Published on: June 23, 2017
Layer-By-Layer Printing Strategy for High-Performance Flexible Electronic Devices with Low-Temperature Catalyzed
Qingqing Sun1,2, Tianqi Gao3, Xiaomeng Li1
1School of Materials Science and Engineering, The Key Laboratory of Material Processing and Mold of Ministry of Education, Henan Key Laboratory of Advanced Nylon Materials and Application, National Center for International Joint Research of Micro-nano Moulding Technology, Zhengzhou University, Zhengzhou, 450001, P. R. China.
A novel layer-by-layer printing method fabricates 3D conductive circuits and thin-film transistors using low-temperature catalyzed, solution-processed silicon dioxide (LCSS) dielectric. This technique enables high-performance flexible electronics with enhanced stability and speed.
Area of Science:
- Materials Science
- Nanotechnology
- Electronics Engineering
Background:
- Additive printing is explored for multilayered electronics.
- Developing versatile dielectric materials for microscale fabrication is crucial.
Purpose of the Study:
- To develop a layer-by-layer printing strategy for multilayered electronics.
- To utilize low-temperature catalyzed, solution-processed silicon dioxide (LCSS) as a dielectric material.
- To fabricate 3D conductive circuits and thin-film transistors (TFTs).
Main Methods:
- Employed a layer-by-layer printing strategy.
- Utilized low-temperature catalyzed, solution-processed SiO2 (LCSS) films formed at 90°C.
- Integrated gold nanoparticles for conductive circuits and single-wall carbon nanotubes for TFTs.
Main Results:
- Achieved high-resolution 3D conductive circuits with sub-microsecond response times.
- Demonstrated TFTs operating at low voltage (1V) with high field-effect mobility (70 cm²/V·s) and on/off ratio (10⁷).
- Exhibited excellent device stability (long-term, negative-gate bias, mechanical) and high yield (100%).
Conclusions:
- The layer-by-layer printing strategy with LCSS is a promising approach for large-scale, high-performance flexible electronics.
- The study provides insights into correlating dielectric properties with device performance.
- This method offers a versatile platform for microscale heterojunction structure fabrication.
