Hardware-Assisted Security Monitoring Unit for Real-Time Ensuring Secure Instruction Execution and Data Processing in...

Area of Science:

• Computer Engineering
• Hardware Security
• Embedded Systems

Background:

• Embedded systems are crucial for safety-critical applications (automotive, aerospace, etc.).
• Despite benefits, embedded systems face hardware vulnerabilities to malicious attacks, risking execution failure and data leakage.
• Existing security measures are insufficient for modern embedded system threats.

Purpose of the Study:

• To present a novel embedded system architecture with an integrated hardware-assisted security monitoring unit (SMU).
• To reinforce system-on-chip (SoC) security for program execution and data processing.
• To evaluate the performance overhead, security capabilities, and resource consumption of the proposed SMU.

Main Methods:

• Designed and implemented a hardware-assisted security monitoring unit (SMU).
• Integrated the SMU into a system-on-chip (SoC) architecture.
• Evaluated the implementation on a Xilinx Virtex-5 FPGA development board using benchmarks.

Main Results:

• The SMU demonstrated minimal performance degradation, with an average overhead of 2.18% on 8-KB I/D-Caches.
• Security evaluations confirmed the SMU's effectiveness against instruction and data tampering attacks.
• The SoC design achieved a favorable balance between high security and resource overhead.

Conclusions:

• The proposed hardware-assisted SMU significantly enhances the security of embedded systems in safety-critical applications.
• The SMU provides robust protection against hardware-level attacks without compromising system performance.
• This approach offers a viable solution for securing embedded systems against evolving cyber threats.