Effect of Step Gate Work Function on InGaAs p-TFET for Low Power Switching Applications

In this study, we theoretically investigated the effect of step gate work function on the InGaAs p-TFET device, which is formed by dual material gate (DMG). We analyzed the performance parameters of the device for low power digital and analog applications based on the gate work function difference (∆ϕ_S-D) of the source (ϕ_S) and drain (ϕ_D) side gate electrodes. In particular, the work function of the drain (ϕ_D) side gate electrodes was varied with respect to the high work function of the source side gate electrode (Pt, ϕ_S = 5.65 eV) to produce the step gate work function. It was found that the device performance varies with the variation of gate work function difference (∆ϕ_S-D) due to a change in the electric field distribution, which also changes the carrier (hole) distribution of the device. We achieved low subthreshold slope (SS) and off-state current (I_off) of 30.89 mV/dec and 0.39 pA/µm, respectively, as well as low power dissipation, when the gate work function difference (∆ϕ_S-D = 1.02 eV) was high. Therefore, the device can be a potential candidate for the future low power digital applications. On the other hand, high transconductance (g_m), high cut-off frequency (f_T), and low output conductance (g_d) of the device at low gate work function difference (∆ϕ_S-D = 0.61 eV) make it a viable candidate for the future low power analog applications.