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Published on: June 18, 2013
Electrolyte-Gated Vertical Synapse Array based on Van Der Waals Heterostructure for Parallel Computing
Seyong Oh1, Ju-Hee Lee1, Seunghwan Seo1
1Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
Abstract:
Recently, three-terminal synaptic devices, which separate read and write terminals, have attracted significant attention because they enable nondestructive read-out and parallel-access for updating synaptic weights. However, owing to their structural features, it is difficult to address the relatively high device density compared with two-terminal synaptic devices. In this study, a vertical synaptic device featuring remotely controllable weight updates via e-field-dependent movement of mobile ions in the ion-gel layer is developed. This synaptic device successfully demonstrates all essential synaptic characteristics, such as excitatory/inhibitory postsynaptic current (E/IPSC), paired-pulse facilitation (PPF), and long-term potentiation/depression (LTP/D) by electrical measurements, and exhibits competitive LTP/D characteristics with a dynamic range (Gmax /Gmin ) of 31.3, and asymmetry (AS) of 8.56. The stability of the LTP/D characteristics is also verified through repeated measurements over 50 cycles; the relative standard deviations (RSDs) of Gmax /Gmin and AS are calculated as 1.65% and 0.25%, respectively. These excellent synaptic properties enable a recognition rate of ≈99% in the training and inference tasks for acoustic and emotional information patterns. This study is expected to be an important foundation for the realization of future parallel computing networks for energy-efficient and high-speed data processing.

