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Algorithm and hardware considerations for real-time neural signal on-implant processing
Zheng Zhang1, Oscar W Savolainen1, Timothy G Constandinou1,2
1Department of Electrical and Electronic Engineering, Imperial College London, South Kensington Campus, London SW7 2AZ, United Kingdom.
Journal of Neural Engineering
|February 7, 2022
Summary
Researchers developed a low-power spike detection algorithm for brain-machine interface (BMI) systems. Optimized for microcontrollers and FPGAs, it achieves high accuracy while minimizing power and resource usage for implantable devices.
Area of Science:
- Neuroscience
- Biomedical Engineering
- Computer Engineering
Background:
- Current brain-machine interface (BMI) systems face limitations in power and size for on-node and on-implant applications.
- System design for BMI requires careful consideration of algorithm complexity, hardware resources, power consumption, and platform choice.
- The impact of these design factors on BMI system performance is not yet fully understood.
Purpose of the Study:
- To develop and optimize a novel real-time spike detection algorithm for 128-channel BMI systems.
- To evaluate the algorithm's performance and resource utilization on microcontroller (MCU) and field-programmable gate array (FPGA) platforms.
- To explore critical design considerations for scalable, portable, and cost-effective real-time neural signal processing.
Main Methods:
- A novel real-time 128-channel spike detection algorithm was designed.
- The algorithm was optimized for implementation on both MCU and FPGA platforms.
- Power consumption, memory footprint, and logic cell usage were quantified for each platform.
Main Results:
- The spike detection algorithm demonstrated over 97% sensitivity and less than 3% false detection rate.
- The MCU implementation consumed 31.5 µW/channel and utilized <3 KB RAM.
- The FPGA implementation used 299 logic cells and <3 KB RAM for 128 channels, consuming only 0.04 µW/channel.
Conclusions:
- The developed spike detection algorithm significantly reduces dynamic power consumption below static power without compromising performance.
- This research provides insights into algorithm and hardware design trade-offs for real-time neural signal processing.
- The findings will guide the development of future real-time on-implant BMI systems, addressing scalability, portability, and cost.
