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Impact of Iterative Deuterium Annealing in Long-Channel MOSFET Performance
Dong-Hyun Wang1, Ja-Yun Ku1, Dae-Han Jung1
1School of Electronics Engineering, Chungbuk National University, Cheongju 28644, Korea.
Materials (Basel, Switzerland)
|March 10, 2022
Summary
High-pressure deuterium annealing (HPD) effectively passivates semiconductor defects. Optimizing HPD cycles improves device performance by maximizing on-state current and minimizing off-state current.
Area of Science:
- Materials Science
- Semiconductor Physics
- Device Engineering
Background:
- Conventional forming gas annealing (FGA) has limitations in passivating dangling bonds at the Si/SiO2 interface.
- High-pressure deuterium annealing (HPD) offers superior passivation but lacks detailed process optimization studies.
Purpose of the Study:
- To investigate the iterative impact of high-pressure deuterium annealing (HPD) on semiconductor device fabrication.
- To determine optimal HPD conditions for enhancing device performance, specifically maximizing on-state current (ION) and minimizing off-state current (IOFF).
Main Methods:
- Fabrication of long-channel gate-enclosed Field-Effect Transistors (FETs) as test vehicles.
- Application of iterative high-pressure deuterium annealing (HPD) cycles.
- Extraction and comparison of device parameters (ION, IOFF) after each annealing cycle.
Main Results:
- Demonstrated iterative improvements in device parameters with increasing HPD cycles.
- Identified a specific HPD condition that optimizes the balance between high ION and low IOFF.
- Quantified the passivation effectiveness of HPD on Si/SiO2 interface defects.
Conclusions:
- High-pressure deuterium annealing (HPD) is a critical process for advanced semiconductor device fabrication.
- Iterative optimization of HPD parameters is essential for achieving superior device performance.
- The study provides a pathway for tailoring HPD processes to maximize desired electrical characteristics.
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