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Parallel Optimisation and Implementation of a Real-Time Back Projection (BP) Algorithm for SAR Based on FPGA.

Yue Cao1,2, Shuchen Guo1, Shuai Jiang1

  • 1Aerospace Information Research Institute, Chinese Academy of Sciences, Beijing 100094, China.

Sensors (Basel, Switzerland)
|March 26, 2022
PubMed
Summary

This study introduces a novel, fully parallel processing architecture for the back projection (BP) algorithm on Field-Programmable Gate Arrays (FPGAs), significantly improving real-time synthetic aperture radar (SAR) imaging performance.

Keywords:
back-projection algorithm (BP)field-programmable gate array (FPGA)real-time image processingsynthetic aperture radar (SAR)

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Area of Science:

  • Electrical Engineering
  • Computer Science
  • Remote Sensing

Background:

  • Real-time image acquisition systems, particularly spaceborne and airborne synthetic aperture radar (SAR), demand efficient processing architectures.
  • Existing methods for SAR imaging face challenges in meeting real-time capability requirements.

Purpose of the Study:

  • To develop and evaluate a fully parallel processing architecture for the back projection (BP) algorithm tailored for Field-Programmable Gate Arrays (FPGAs).
  • To enhance the processing speed and efficiency of SAR imaging systems for real-time applications.

Main Methods:

  • Analysis of SAR imaging principles and models to design a BP algorithm architecture.
  • Implementation of a fully parallel BP algorithm on an FPGA platform.
  • Optimization of the algorithm through detailed analysis of flow, fixed-point operations, parallel processing, and distributed storage.

Main Results:

  • Achieved a maximum hardware resource utilization rate exceeding 80% with a system power consumption of 21.073 W.
  • Demonstrated superior processing time efficiency compared to FPGA, Digital Signal Processor (DSP), Graphics Processing Unit (GPU), and Central Processing Unit (CPU) designs.
  • Generated a 900 × 900 pixel image in 1.1 seconds at a 200 MHz clock rate, verifying correctness with actual data.

Conclusions:

  • The proposed fully parallel BP algorithm architecture on FPGA offers significant advantages in processing time and efficiency for real-time SAR imaging.
  • This technology provides an integrated solution for multi-mode, multi-resolution, and multi-geometry signal processing in SAR systems.
  • Lays the foundation for developing new, high-performance SAR systems capable of real-time imaging processing.