Fast Constant-Time Modular Inversion over Fp Resistant to Simple Power Analysis Attacks for IoT Applications.

Area of Science:

• Cryptography
• Computer Engineering
• Information Security

Background:

• Public-key cryptography (PKC) is essential for securing Internet of Things (IoT) devices and electronic systems.
• Finite field arithmetic, particularly inversion, is a critical and computationally expensive operation in PKC.
• Existing methods for modular inversion present performance and security vulnerabilities, especially against side-channel attacks like Simple Power Analysis (SPA).

Purpose of the Study:

• To propose a novel, fast, and constant-time modular inverter over prime fields (Fp).
• To enhance security by developing a modified Binary Extended Euclidean Algorithm (MBEEA) resistant to SPA attacks.
• To optimize the inverter's performance in terms of area-delay product (ADP) for practical implementation.

Main Methods:

• Developed a modified Binary Extended Euclidean Algorithm (MBEEA) for modular inversion over prime fields.
• Revisited and optimized core arithmetic operations like modular addition and subtraction to enhance MBEEA efficiency.
• Implemented and tested the MBEEA architecture on Xilinx FPGA Virtex #5, #6, and #7 devices.

Main Results:

• Achieved a modular inversion time of 1.12 μs for a 256-bit prime field (Fp) on a Virtex-7 FPGA.
• The proposed MBEEA design demonstrated resistance to Simple Power Analysis (SPA) attacks.
• The implementation achieved a low area-delay product (ADP), outperforming existing inverter designs.

Conclusions:

• The proposed MBEEA offers a significant improvement in speed and security for modular inversion in cryptographic applications.
• This efficient and secure inverter is well-suited for resource-constrained environments like IoT devices.
• The design provides a competitive solution with a lower ADP compared to previously reported inverters.