High coherence and low cross-talk in a tileable 3D integrated superconducting circuit architecture

Area of Science:

• Quantum Computing
• Superconducting Circuits
• Quantum Architecture

Background:

• Scalable quantum computing architectures are crucial for advancing quantum technologies.
• Superconducting qubits offer a promising platform but face challenges in scalability and coherence.
• Existing architectures often struggle with control wiring complexity and maintaining qubit isolation in larger arrays.

Purpose of the Study:

• To present a novel superconducting circuit architecture designed for scalability to two-dimensional (2D) lattices.
• To demonstrate high qubit coherence and low error rates in a proof-of-principle device.
• To investigate the potential for maintaining a clean electromagnetic environment in scaled-up architectures.

Main Methods:

• Integration of an inductively shunted cavity enclosure.
• Utilization of non-galvanic out-of-plane control wiring.
• Fabrication of qubits and resonators on opposing sides of a substrate.
• Simultaneous randomized benchmarking for gate fidelity and coherence time measurements.
• Band structure simulations for predicting electromagnetic environment in tiled lattices.

Main Results:

• Achieved high average energy relaxation times (T1 = 149(38) μs) and pure echoed dephasing times (Tϕ = 189(34) μs).
• Demonstrated high single-qubit gate fidelities (F = 99.982(4)%) using simultaneous randomized benchmarking.
• The 3D integrated control wiring ensures qubit addressability in tiled 2D lattices.
• Band structure simulations predict a clean electromagnetic environment at arbitrary scales.

Conclusions:

• The reported superconducting circuit architecture offers a scalable solution for building large-scale quantum processors.
• The design effectively minimizes cross-talk and single-qubit gate errors, crucial for fault-tolerant quantum computation.
• This 3D integration approach paves the way for modular and extensible quantum computing systems.