An Automatic Clock-Induced-Spurs Detector Based on Energy Detection for Direct Digital Frequency Synthesizer

Area of Science:

• Electrical Engineering
• Signal Processing
• Integrated Circuit Design

Background:

• Direct digital frequency synthesizers (DDS) are susceptible to clock-induced spurs.
• Accurate detection and mitigation of these spurs are crucial for maintaining signal integrity.
• Existing methods may require off-chip instrumentation or lack automated spur characterization.

Purpose of the Study:

• To develop and validate an integrated clock-induced spurs detector for DDS.
• To automatically extract amplitude and phase of spurs for targeted mitigation.
• To enhance the spurious-free dynamic range (SFDR) of a DDS without external equipment.

Main Methods:

• A detector comprising a programmable low-pass filter (LPF), energy detector, and spur detection algorithm was designed.
• The detector was integrated into a four-channel 1 GSPS DDS.
• Spur characteristics were extracted and used to control an auxiliary DDS for spur reduction.

Main Results:

• The integrated detector successfully enhanced the DDS SFDR from -43.1 dBc to -59.9 dBc.
• Detection accuracy reached approximately -81 dBm.
• The detector consumed only 38 mW, 6% of a single-channel DDS power.
• Fabricated using a 65 nm CMOS process with a small area of 190 μm × 320 μm.

Conclusions:

• The proposed integrated detector effectively mitigates clock-induced spurs in DDS.
• This solution offers significant improvements in SFDR and signal quality.
• The design enables power-efficient, on-chip spur management and supports rapid frequency switching.