Prediction Techniques on FPGA for Latency Reduction on Tactile Internet

Area of Science:

• Computer Engineering
• Telecommunications
• Human-Computer Interaction

Background:

• Tactile Internet (TI) enables new human-to-machine applications by transmitting touch and other sensory data.
• TI applications demand extremely low latency, which is currently hindered by communication, device processing, and data complexity.

Purpose of the Study:

• To propose and validate the use of hardware-based reconfigurable computing for reducing prediction technique latency in TI.
• To demonstrate the effectiveness of Field-Programmable Gate Arrays (FPGAs) in mitigating TI latency and data loss issues.

Main Methods:

• Implementation of prediction techniques on FPGAs for dedicated hardware acceleration.
• Comparative analysis of software versus hardware implementations of these techniques.
• Evaluation of hardware synthesis results, including area, throughput, and power consumption.

Main Results:

• FPGA-based prediction techniques significantly minimize latency and data loss impacts in TI systems.
• Hardware implementations achieve substantial improvements over software, with power consumption reduced by approximately 1300×.
• Speedup rates of up to 52× were observed compared to state-of-the-art methods.

Conclusions:

• Reconfigurable computing using FPGAs is a viable solution for addressing the low-latency requirements of Tactile Internet.
• Hardware acceleration offers significant performance gains and power efficiency for TI prediction techniques.
• This work paves the way for more robust and responsive TI applications.