Compact Modeling Technology for the Simulation of Integrated Circuits Based on Graphene Field-Effect Transistors

Area of Science:

• Semiconductor Device Physics
• Materials Science
• Electrical Engineering

Background:

• Graphene field-effect transistors (GFETs) offer unique electronic properties but require robust modeling for circuit integration.
• Existing models often lack the modularity and comprehensive scope needed for arbitrary GFET circuit analysis.

Purpose of the Study:

• To establish a modular compact modeling technology for GFETs.
• To enable accurate electrical analysis of complex GFET-based integrated circuits.
• To bridge the gap between device physics and circuit-level simulation.

Main Methods:

• Development of primary models for ideal GFET response (DC, transient, AC, noise).
• Incorporation of secondary models for non-ideal GFET effects (extrinsic, short-channel, trapping, self-heating, non-quasi static).
• Validation of models through comparison of simulation results with experimental data at device and circuit levels.

Main Results:

• A comprehensive set of primary and secondary models for GFETs has been defined.
• High consistency between simulation outputs and experimental data was demonstrated for various operating conditions.
• The developed technology facilitates the electrical analysis of arbitrary GFET-based integrated circuits.

Conclusions:

• The modular compact modeling technology provides a reliable framework for GFET circuit design and analysis.
• Addressing non-idealities is crucial for accurate static and dynamic operation simulations.
• Collaboration between fabrication, modeling, and design groups is essential for scaling GFET modeling technology.