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Related Concept Videos

Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the gate...
Characteristics of MOSFET01:17

Characteristics of MOSFET

Metal-oxide-semiconductor field-effect Transistors, or MOSFETs, play a critical role in electronic circuits. They are primarily utilized for amplifying and switching signals.
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P-N junction01:11

P-N junction

A p-n junction is formed when p-type and n-type semiconductor materials are joined together. At the interface of the p-n junction, holes from the p-side and electrons from the n-side begin to diffuse into the opposite sides due to the concentration gradient. This diffusion of carriers leads to a region around the junction where there are no free charge carriers, known as the depletion region. The charge density within the depletion region for the n-side and p-side can be described by the...
Field Effect Transistor01:29

Field Effect Transistor

Field-effect transistors (FETs) are integral to electronic circuits and distinguished by their three-terminal setup: the gate, drain, and source. These transistors operate as unipolar devices, which utilize either electrons or holes as charge carriers, in contrast to bipolar transistors, which use both types of carriers. The primary function of the FET is to modulate the flow of these carriers from the source to the drain through a channel. The voltage difference between the gate and source...
The Electrical Double Layer01:30

The Electrical Double Layer

In the region where two bulk phases meet, an intricate electric charge distribution arises due to charge transfer, ion adsorption, molecular orientation, and charge distortion. This complex distribution is commonly referred to as the electrical double layer.When a solid electrode interfaces with ions in an electrolyte solution, the speed of electron transfer dictates the rates of oxidation and reduction. The electrode acquires a charge through the escape of atoms into the solution as cations or...
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  1. Home
  3. Analytical Solution For The Potential Distribution In The Channel Of A Graphene Field-effect Transistor Validated With A Custom-fabricated Test Platform.
  1. Home
  3. Analytical Solution For The Potential Distribution In The Channel Of A Graphene Field-effect Transistor Validated With A Custom-fabricated Test Platform.

Related Experiment Video

Development and Functionalization of Electrolyte-Gated Graphene Field-Effect Transistor for Biomarker Detection
07:51

Development and Functionalization of Electrolyte-Gated Graphene Field-Effect Transistor for Biomarker Detection

Published on: February 1, 2022

Analytical Solution for the Potential Distribution in the Channel of A Graphene Field-Effect Transistor Validated

Antonio Cantudo1, Francisco Pasadas1,2, Anibal Pacheco-Sánchez1,2

  • 1Departamento de Electrónica y Tecnología de Computadores, Facultad de Ciencias, Universidad de Granada, 18071 Granada, Spain.

ACS Applied Electronic Materials
|May 18, 2026

View abstract on PubMed

Summary
This summary is machine-generated.
Keywords:
GFETanalytical modelcircuit simulationgraphenein-channel potentialpotential distributiontransistor

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A new analytical framework accurately models potential distribution in graphene-based field-effect transistors (GFETs). This validated model offers insights into GFET operation for advanced electronic applications.

Area of Science:

  • Materials Science
  • Condensed Matter Physics
  • Electrical Engineering

Background:

  • Graphene-based field-effect transistors (GFETs) are crucial for next-generation electronics.
  • Accurate modeling of internal potential distribution is essential for GFET performance optimization.
  • Existing models may lack the analytical rigor and experimental validation needed for complex device physics.

Purpose of the Study:

  • To develop a comprehensive analytical framework for computing potential distribution in GFETs.
  • To introduce novel closed-form expressions for describing internal potential profiles.
  • To experimentally validate the proposed models using a custom GFET test platform.

Main Methods:

  • Development of self-consistent, explicit closed-form analytical expressions for potential profiles.
  • Fabrication of global back-gated GFETs with in-channel terminals for potential measurements.
  • Systematic comparison of experimental drain current and in-channel potential data with model predictions.

    • Main Results:

    • The analytical framework accurately describes potential profiles along the graphene channel.
    • Experimental validation shows excellent agreement between model predictions and device measurements across various bias conditions.
    • The models successfully capture both unipolar and ambipolar transport regimes in GFETs.

    Conclusions:

    • The validated analytical framework provides a powerful tool for understanding GFET electrostatics.
    • It enables clear physical interpretation of transport phenomena like channel pinch-off and transport regime transitions.
    • The models are computationally efficient, aiding rapid GFET evaluation for diverse applications.