On the design and manufacturing of miniaturized microstripline power splitters for driving multicoil transmit arrays with arbitrary ratios at 7 T
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Published on: July 5, 2013
Charlotte R Sappo1,2, Gabriela L Gallego3, William A Grissom1,2,3,4
1Vanderbilt University Institute of Imaging Science, Nashville, Tennessee, USA.
Abstract:
The purpose of the current study was to implement unequal microstrip power splitters for parallel transmission at 7 T that are optimized for size and loss and that can be configured for a wide range of power ratios. The splitters will enable the use of more transmit coils without a corresponding increase in the number of transmit channels or amplifiers to control specific absorption rate, shorten RF pulses, and shim inhomogeneous RF fields. Wilkinson unequal power splitters based on a novel microstrip network design were optimized to minimize their size under 8 cm in length and 9 cm in width, enabling them to be included in coil housing or cascaded in multiple stages. Splitters were designed and constructed for a wide range of output power ratios at 298 MHz. Simulations and bench tests were performed for each ratio, and a methodology was established to adapt the designs to other ratios and frequencies. The designs and code are open source and can be reproduced as is or reconfigured. The single-stage designs achieved good matches and isolations between output ports (worst isolation -15.9 dB, worst match -15.1 dB). A two-stage cascaded (one input to four outputs) power splitter with 1:2.5, 1:10, 1:3, and 1:6 ratio outputs was constructed. The worst isolation between output ports was -19.7 dB in simulation and the worst match of the three ports was -17.8 dB. The measured ratios for one- and two-stage boards were within 10% of the theoretical ratios. The power-handling capability of the smallest trace was approximately 70 W. Power loss for the one- and two-stage boards ranged from 1% to 3% in simulation compared with 5.1% to 7.2% on the bench. It was concluded that Wilkinson unequal microstrip power splitters can be implemented with a small board size (low height) and low loss, and across a wide range of output power ratios. The splitters can be cascaded in multiple stages while maintaining the expected ratios and low loss. This will enable the construction of large fixed transmit array-compression matrices with low loss.
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